1. Field of the Invention
This invention relates generally to the field of computer processors. More particularly, the invention relates to an apparatus and method for implementing a scratchpad memory.
2. Description of the Related Art
Scratchpad memories are local, high-speed memories that are manually controlled by the application. By precisely controlling data movements to and from scratchpads, applications can maximize performance, utilization, and energy efficiency. IBM's Cell and NVIDIA's recent GPUs, for example, provide such mechanisms.
Due to high hardware costs and a large increase to the architectural state, however, scratchpad memories are sometimes emulated on top of a cache-based memory hierarchy, typically by adjusting the cache line replacement policy (e.g., such as a least recently used (LRU) policy). For example, a processor will provide user-level instructions to directly adjust the replacement priority of a cache line, so that the application can effectively ‘pin’ a region of memory in the cache.
However, allowing user-level code to directly modify the cache replacement priority exposes fairness and security issues. For example, malicious code may aggressively mark its cache lines as pseudo-pinned, resulting in unfair utilization of shared cache space. Additionally, since the cache replacement priority is not maintained by the operating system, priority adjustments may survive context switching boundaries, and inadequately endow privileges to inappropriate software contexts (i.e., a process that is switched out may still occupy most/all of the cache space with pseudo-pinned lines).